Research Article Open Access

Design of Multi-Valued Quaternary Based Analog-to-Digital Converter

A.H.M. Zahirul Alam, Wahab Adetunji Lawal, Sheroz Khan and Muhammad Mahbubur Rashid


Problem statement: The design of multi-valued quaternary based Analog-to-Digital Converter (ADC) circuit was presented. The ADC generates multi-valued logic outputs rather than the conventional binary output system to overall reduction in circuit complexity and size. Approach: Design was implemented using pipeline ADC architecture and was simulated using model parameters based on standard 0.13 µm CMOS process. Results: Performance analysis of the design showed desirable performance parameters in terms of response, low power consumption, and a sampling rate of 10 MHz at a supply voltage of 1.3V was achieved. Conclusion/Recommendations: The ADC design was suitable for the needs of mixed-signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple-valued logic design.

American Journal of Applied Sciences
Volume 6 No. 8, 2009, 1521-1525


Submitted On: 1 July 2009 Published On: 31 August 2009

How to Cite: Alam, A. Z., Lawal, W. A., Khan, S. & Rashid, M. M. (2009). Design of Multi-Valued Quaternary Based Analog-to-Digital Converter. American Journal of Applied Sciences, 6(8), 1521-1525.

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  • Analog to digital converter
  • multi valued
  • quaternary
  • pipeline ADC