Research Article Open Access

Design of 8-4 and 9-4 Compressors Forhigh Speed Multiplication

R. Marimuthu1, Dhruv Bansal1, S. Balamurugan1 and P. S. Mallick1
  • 1 School of Electrical Engineering, VIT University, Vellore, India


This study presents higher order compressors which can be effectively used for high speed multiplications. The proposed compressors offer less delay and area. But the Energy Delay Product (EDP) is slightly higher than lower order compressors. The performance of 8×8, 16×16 and 24×24 multipliers using the proposed higher order compressors has been compared with the same multipliers using lower order compressors and found that the new structures can be used for high speed multiplications. These compressors are simulated with Cadence RTL complier at a temperature of 25°C with the supply voltage of 1.2 V.

American Journal of Applied Sciences
Volume 10 No. 8, 2013, 893-900


Submitted On: 23 December 2012 Published On: 24 July 2013

How to Cite: Marimuthu, R., Bansal, D., Balamurugan, S. & Mallick, P. S. (2013). Design of 8-4 and 9-4 Compressors Forhigh Speed Multiplication. American Journal of Applied Sciences, 10(8), 893-900.

  • 18 Citations



  • Binary Multiplier
  • Compressors
  • High Speed Adder
  • Area Efficient
  • Energy Delay Product