Research Article Open Access

Design and Simulation of an Input Queuing Packet Switch

Azeddine Bilami, Mustapha Lalam and Mohamed Benmohammed


Many Architectures of Internet routers, ATM and Ethernet switches have been proposed and analysed in literature. Theoretically reliable and valid solutions have been developed to achieve high performances, but a lot of them are not feasible in practice for commercial and technological reasons. Few papers develop the implementation and simulation aspects. The objective of this study is the design of a packet switch with a minimum cost and hardware complexity. We propose an input-queuing architecture using a multistage interconnection network and a simple cell selection policy implemented by hardware. The switch is described and simulated using a VHDL language. Performances in terms of throughput and cell loss are evaluated.

Journal of Computer Science
Volume 1 No. 3, 2005, 296-303


Submitted On: 26 January 2005 Published On: 19 September 2005

How to Cite: Bilami, A., Lalam, M. & Benmohammed, M. (2005). Design and Simulation of an Input Queuing Packet Switch. Journal of Computer Science, 1(3), 296-303.

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  • Routing
  • Switch
  • Multistage Interconnection Network (MIN)
  • Benes Network
  • Self Routing
  • VHDL