Research Article Open Access

Design and Analysis of SRAM Cell for Smart Application 

Pushkar Praveen1 and Rakesh Kumar Singh2
  • 1 Department of Electronics and Communication Engineering, UTU, Dehradun, India
  • 2 Department of Electronics and Communication Engineering, BTKIT, Dwarahat, India


In today's circuittechnology, power consumption and savings are key concerns. The driving reasonsbehind these innovations are portable devices that require high throughput andlow power dissipation, such as computers, phones, and Personal DigitalAssistants (PDAs). In portable devices, reducing or decreasing IC dissipatedpower through design optimization is a big problem, and restricted batterylifespan places very severe restrictions on overall power usage. In this study SRAMcircuit for smart applications has been investigated using various factors suchas write, read, dynamic, static power with voltage and temperature. The powerconsumption analysis is the most essential criteria for memory design. Becausedata stability is a critical concern, affecting both the read and write operations.The implemented 9T SRAM in this study is more efficient than the other SRAM interms of power usage. When compared with the existing SRAM circuits taken forcomparison of different parameters, the proposed 9T SRAM, circuit uses lessthan 28.2% write power, while it uses about the same for read operation. Thedata retention voltage for both circuits is 0.29 V, which is utilized to storethe data in the circuit. The 32 nm Bulk CMOS process technology from PTM filesis used for designing and analysis. 

Journal of Computer Science
Volume 18 No. 9, 2022, 852-859


Submitted On: 8 April 2022 Published On: 17 September 2022

How to Cite: Praveen, P. & Singh, R. K. (2022). Design and Analysis of SRAM Cell for Smart Application . Journal of Computer Science, 18(9), 852-859.

  • 1 Citations



  • SRAM
  • Static
  • Dynamic
  • Read
  • Write
  • Temperature
  • Threshold Voltage
  • Supply Voltage