@article {10.3844/ajassp.2013.1537.1545,
article_type = {journal},
title = {Delay and Power Reduction in New Routing Fabrics},
author = {Vijayakumar, S. and Sundararajan, J. and Kumar, P. and Nithya, K.},
volume = {10},
year = {2013},
month = {Oct},
pages = {1537-1545},
doi = {10.3844/ajassp.2013.1537.1545},
url = {https://thescipub.com/abstract/ajassp.2013.1537.1545},
abstract = {In this study we created a new routing fabric for reducing power and delay. The power consumed in a FPGA core consists of both static and dynamic components. Static power contributes only 10% of the total power consumed in a FPGA. On the other hand, dynamic power contributes over 90% of the total power consumed and it is the main source for their power inefficiency. By reducing net length and/or programming overhead the power consumption reduced. Routed net length reduced by using short intersects segments in the routing channels. By decreasing the switch box and/or connection box flexibilities programming overhead reduced. In this study ,we concentrated on achieving 1.80 times lower consumption of dynamic power and 1.50 times less significant average net delays by re-architecting the programmable routing fabrics such that both routed net lengths and programming overhead reduced without adversely affecting delay.},
journal = {American Journal of Applied Sciences},
publisher = {Science Publications}
}