TY  - JOUR
AU  - Vijayakumar, S. 
AU  - Sundararajan, J. 
AU  - Kumar, P. 
AU  - Nithya, K. 
PY  - 2013
TI  - Delay and Power Reduction in New Routing Fabrics
JF  - American Journal of Applied Sciences
VL  - 10
IS  - 12
DO  - 10.3844/ajassp.2013.1537.1545
UR  - https://thescipub.com/abstract/ajassp.2013.1537.1545
AB  - In this study we created a new routing fabric for reducing power and delay. The power consumed in a FPGA core consists of both static and dynamic components. Static power contributes only 10% of the total power consumed in a FPGA. On the other hand, dynamic power contributes over 90% of the total power consumed and it is the main source for their power inefficiency. By reducing net length and/or programming overhead the power consumption reduced. Routed net length reduced by using short intersects segments in the routing channels. By decreasing the switch box and/or connection box flexibilities programming overhead reduced. In this study ,we concentrated on achieving 1.80 times lower consumption of dynamic power and 1.50 times less significant average net delays by re-architecting the programmable routing fabrics such that both routed net lengths and programming overhead reduced without adversely affecting delay.