Research Article Open Access

AN IMPROVED DESIGN OF REVERSIBLE BINARY TO BINARY CODED DECIMAL CONVERTER FOR BINARY CODED DECIMAL MULTIPLICATION

Praveena Murugesan1 and Thanushkodi Keppanagounder2
  • 1 Department of ECE, Anna University, Tamilnadu, India
  • 2 Akshaya College of Engineering and Technology, Coimbatore, Tamilnadu, India

Abstract

Reversible logic gates under ideal conditions produce zero power dissipation. This factor highlights the usage of these gates in optical computing, low power CMOS design, quantum optics and quantum computing. The growth of decimal arithmetic in various applications as stressed the need to propose the study on reversible binary to BCD converter which plays a greater role in decimal multiplication for providing faster results. The different parameters such as gate count,garbage output and constant input are more optimized in the proposed fixed bit binary to binary coded decimal converter than the existing design.

American Journal of Applied Sciences
Volume 11 No. 1, 2014, 69-73

DOI: https://doi.org/10.3844/ajassp.2014.69.73

Submitted On: 17 September 2012 Published On: 28 November 2013

How to Cite: Murugesan, P. & Keppanagounder, T. (2014). AN IMPROVED DESIGN OF REVERSIBLE BINARY TO BINARY CODED DECIMAL CONVERTER FOR BINARY CODED DECIMAL MULTIPLICATION. American Journal of Applied Sciences, 11(1), 69-73. https://doi.org/10.3844/ajassp.2014.69.73

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Keywords

  • Reversible Logic
  • BCD Multiplication
  • Quantum Computing
  • Nanotechnology